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stm32 /stm32u5 /STM32U535 /ADC4 /ADC_SMPR

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Interpret as ADC_SMPR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0SMP10SMP20 (SMPSEL0)SMPSEL0 0 (SMPSEL1)SMPSEL1 0 (SMPSEL2)SMPSEL2 0 (SMPSEL3)SMPSEL3 0 (SMPSEL4)SMPSEL4 0 (SMPSEL5)SMPSEL5 0 (SMPSEL6)SMPSEL6 0 (SMPSEL7)SMPSEL7 0 (SMPSEL8)SMPSEL8 0 (SMPSEL9)SMPSEL9 0 (SMPSEL10)SMPSEL10 0 (SMPSEL11)SMPSEL11 0 (SMPSEL12)SMPSEL12 0 (SMPSEL13)SMPSEL13 0 (SMPSEL14)SMPSEL14 0 (SMPSEL15)SMPSEL15 0 (SMPSEL16)SMPSEL16 0 (SMPSEL17)SMPSEL17 0 (SMPSEL18)SMPSEL18 0 (SMPSEL19)SMPSEL19 0 (SMPSEL20)SMPSEL20 0 (SMPSEL21)SMPSEL21 0 (SMPSEL22)SMPSEL22 0 (SMPSEL23)SMPSEL23

Description

ADC sample time register

Fields

SMP1

SMP1
SMP2

SMP2
SMPSEL0

SMPSEL0
SMPSEL1

SMPSEL1
SMPSEL2

SMPSEL2
SMPSEL3

SMPSEL3
SMPSEL4

SMPSEL4
SMPSEL5

SMPSEL5
SMPSEL6

SMPSEL6
SMPSEL7

SMPSEL7
SMPSEL8

SMPSEL8
SMPSEL9

SMPSEL9
SMPSEL10

SMPSEL10
SMPSEL11

SMPSEL11
SMPSEL12

SMPSEL12
SMPSEL13

SMPSEL13
SMPSEL14

SMPSEL14
SMPSEL15

SMPSEL15
SMPSEL16

SMPSEL16
SMPSEL17

SMPSEL17
SMPSEL18

SMPSEL18
SMPSEL19

SMPSEL19
SMPSEL20

SMPSEL20
SMPSEL21

SMPSEL21
SMPSEL22

SMPSEL22
SMPSEL23

SMPSEL23

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32