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stm32 /stm32u5 /STM32U535 /GTZC2_TZIC /FCR1

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Interpret as FCR1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (CSPI3F)CSPI3F 0 (CLPUART1F)CLPUART1F 0 (CI2C3F)CI2C3F 0 (CLPTIM1F)CLPTIM1F 0 (CLPTIM3F)CLPTIM3F 0 (CLPTIM4F)CLPTIM4F 0 (COPAMPF)COPAMPF 0 (CCOMPF)CCOMPF 0 (CADC2F)CADC2F 0 (CVREFBUFF)CVREFBUFF 0 (CDAC1F)CDAC1F 0 (CADF1F)CADF1F

Description

TZIC flag clear register 1

Fields

CSPI3F

clear the illegal access flag for SPI3
CLPUART1F

clear the illegal access flag for LPUART1
CI2C3F

clear the illegal access flag for I2C3
CLPTIM1F

clear the illegal access flag for LPTIM1
CLPTIM3F

clear the illegal access flag for LPTIM3
CLPTIM4F

clear the illegal access flag for LPTIM4
COPAMPF

clear the illegal access flag for OPAMP
CCOMPF

clear the illegal access flag for COMP
CADC2F

clear the illegal access flag for ADC2
CVREFBUFF

clear the illegal access flag for VREFBUF
CDAC1F

clear the illegal access flag for DAC1
CADF1F

clear the illegal access flag for ADF1

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32