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stm32 /stm32u5 /STM32U535 /LPUART1 /ISR_disabled

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Interpret as ISR_disabled

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PE)PE 0 (FE)FE 0 (NE)NE 0 (ORE)ORE 0 (IDLE)IDLE 0 (RXNE)RXNE 0 (TC)TC 0 (TXE)TXE 0 (CTSIF)CTSIF 0 (CTS)CTS 0 (BUSY)BUSY 0 (CMF)CMF 0 (SBKF)SBKF 0 (RWU)RWU 0 (TEACK)TEACK 0 (REACK)REACK

Description

Interrupt and status register

Fields

PE

PE
FE

FE
NE

NE
ORE

ORE
IDLE

IDLE
RXNE

RXNE
TC

TC
TXE

TXE
CTSIF

CTSIF
CTS

CTS
BUSY

BUSY
CMF

CMF
SBKF

SBKF
RWU

RWU
TEACK

TEACK
REACK

REACK

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32