configuration register 2
| MSSI | Master SS Idleness |
| MIDI | Master Inter-Data Idleness |
| RDIMM | RDIMM |
| RDIOP | RDIOP |
| IOSWP | Swap functionality of MISO and MOSI pins |
| COMM | SPI Communication Mode |
| SP | Serial Protocol |
| MASTER | SPI Master |
| LSBFRST | Data frame format |
| CPHA | Clock phase |
| CPOL | Clock polarity |
| SSM | Software management of SS signal input |
| SSIOP | SS input/output polarity |
| SSOE | SS output enable |
| SSOM | SS output management in master mode |
| AFCNTR | Alternate function GPIOs control |