Regviz

stm32 /stm32u5 /STM32U535 /TAMP /SMISR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SMISR

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32u5/STM32U535/TAMP/SMISR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TAMP1MF)TAMP1MF 0 (TAMP2MF)TAMP2MF 0 (TAMP3MF)TAMP3MF 0 (TAMP4MF)TAMP4MF 0 (TAMP5MF)TAMP5MF 0 (TAMP6MF)TAMP6MF 0 (TAMP7MF)TAMP7MF 0 (TAMP8MF)TAMP8MF 0 (ITAMP1MF)ITAMP1MF 0 (ITAMP2MF)ITAMP2MF 0 (ITAMP3MF)ITAMP3MF 0 (ITAMP5MF)ITAMP5MF 0 (ITAMP6MF)ITAMP6MF 0 (ITAMP7MF)ITAMP7MF 0 (ITAMP8MF)ITAMP8MF 0 (ITAMP9MF)ITAMP9MF 0 (ITAMP11MF)ITAMP11MF 0 (ITAMP12MF)ITAMP12MF 0 (ITAMP13MF)ITAMP13MF

Description

TAMP secure masked interrupt status register

Fields

TAMP1MF

TAMP1MF
TAMP2MF

TAMP2MF
TAMP3MF

TAMP3MF
TAMP4MF

TAMP4MF
TAMP5MF

TAMP5MF
TAMP6MF

TAMP6MF
TAMP7MF

TAMP7MF
TAMP8MF

TAMP8MF
ITAMP1MF

ITAMP1MF
ITAMP2MF

ITAMP2MF
ITAMP3MF

ITAMP3MF
ITAMP5MF

ITAMP5MF
ITAMP6MF

ITAMP6MF
ITAMP7MF

ITAMP7MF
ITAMP8MF

ITAMP8MF
ITAMP9MF

ITAMP9MF
ITAMP11MF

ITAMP11MF
ITAMP12MF

ITAMP12MF
ITAMP13MF

ITAMP13MF

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32