Regviz

stm32 /stm32u5 /STM32U575 /OTG_FS /DIEPMSK

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DIEPMSK

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32u5/STM32U575/OTG_FS/DIEPMSK#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (XFRCM)XFRCM 0 (EPDM)EPDM 0 (TOM)TOM 0 (ITTXFEMSK)ITTXFEMSK 0 (INEPNMM)INEPNMM 0 (INEPNEM)INEPNEM 0 (NAKM)NAKM

Description

This register works with each of the DIEPINTx registers for all endpoints to generate an interrupt per IN endpoint. The IN endpoint interrupt for a specific status in the DIEPINTx register can be masked by writing to the corresponding bit in this register. Status bits are masked by default.

Fields

XFRCM

XFRCM
EPDM

EPDM
TOM

TOM
ITTXFEMSK

ITTXFEMSK
INEPNMM

INEPNMM
INEPNEM

INEPNEM
NAKM

NAKM

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32