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stm32 /stm32u5 /STM32U575 /OTG_FS /DVBUSDIS

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Interpret as DVBUSDIS

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0VBUSDT

Description

This register specifies the VBUS discharge time after VBUS pulsing during SRP.

Fields

VBUSDT

VBUSDT

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32