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stm32 /stm32u5 /STM32U575 /PWR /PWR_PDCRI

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Interpret as PWR_PDCRI

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PD0)PD0 0 (PD1)PD1 0 (PD2)PD2 0 (PD3)PD3 0 (PD4)PD4 0 (PD5)PD5 0 (PD6)PD6 0 (PD7)PD7

Description

PWR port I pull-down control register

Fields

PD0

Port I pull-down bit
PD1

Port I pull-down bit
PD2

Port I pull-down bit
PD3

Port I pull-down bit
PD4

Port I pull-down bit
PD5

Port I pull-down bit
PD6

Port I pull-down bit
PD7

Port I pull-down bit

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32