Regviz

stm32 /stm32wb /STM32WB10_CM4 /PWR /C2CR3

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as C2CR3

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32wb/STM32WB10_CM4/PWR/C2CR3#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (EWUP1)EWUP1 0 (EWUP2)EWUP2 0 (EWUP3)EWUP3 0 (EWUP4)EWUP4 0 (EWUP5)EWUP5 0 (EBLEWUP)EBLEWUP 0 (E802WUP)E802WUP 0 (APC)APC 0 (EIWUL)EIWUL

Description

CPU2 Power control register 3

Fields

EWUP1

Enable Wakeup pin WKUP1 for CPU2
EWUP2

Enable Wakeup pin WKUP2 for CPU2
EWUP3

Enable Wakeup pin WKUP3 for CPU2
EWUP4

Enable Wakeup pin WKUP4 for CPU2
EWUP5

Enable Wakeup pin WKUP5 for CPU2
EBLEWUP

Enable BLE host wakeup interrupt for CPU2
E802WUP

Enable 802.15.4 host wakeup interrupt for CPU2
APC

Apply pull-up and pull-down configuration for CPU2
EIWUL

Enable internal wakeup line for CPU2

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32