stm32 /stm32wb /STM32WB10_CM4 /RCC /CSR

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Interpret as CSR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (LSI1ON)LSI1ON 0 (LSI1RDY)LSI1RDY 0 (LSI2ON)LSI2ON 0 (LSI2RDY)LSI2RDY 0 (LSI2TRIMEN)LSI2TRIMEN 0 (LSI2TRIMOK)LSI2TRIMOK 0LSI2BW0RFWKPSEL 0 (RFRSTS)RFRSTS 0 (RMVF)RMVF 0 (OBLRSTF)OBLRSTF 0 (PINRSTF)PINRSTF 0 (BORRSTF)BORRSTF 0 (SFTRSTF)SFTRSTF 0 (IWDGRSTF)IWDGRSTF 0 (WWDGRSTF)WWDGRSTF 0 (LPWRRSTF)LPWRRSTF

Description

CSR

Fields

LSI1ON

LSI1 oscillator enabled

LSI1RDY

LSI1 oscillator ready

LSI2ON

LSI2 oscillator enabled

LSI2RDY

LSI2 oscillator ready

LSI2TRIMEN

LSI2 oscillator trimming enable

LSI2TRIMOK

LSI2 oscillator trim OK

LSI2BW

LSI2 oscillator bias configuration

RFWKPSEL

RF system wakeup clock source selection

RFRSTS

Radio system BLE and 802.15.4 reset status

RMVF

Remove reset flag

OBLRSTF

Option byte loader reset flag

PINRSTF

Pin reset flag

BORRSTF

BOR flag

SFTRSTF

Software reset flag

IWDGRSTF

Independent window watchdog reset flag

WWDGRSTF

Window watchdog reset flag

LPWRRSTF

Low-power reset flag

Links

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