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stm32 /stm32wb /STM32WB15_CM4 /AES2 /IVR0

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Interpret as IVR0

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0IVI

Description

initialization vector register 0

Fields

IVI

initialization vector register (LSB IVR [31:0])

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32