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stm32 /stm32wb /STM32WB15_CM4 /PWR /SR2

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Interpret as SR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (SMPSBF)SMPSBF 0 (SMPSF)SMPSF 0 (REGLPS)REGLPS 0 (REGLPF)REGLPF 0 (VOSF)VOSF 0 (PVDO)PVDO 0 (PVMO3)PVMO3

Description

Power status register 2

Fields

SMPSBF

Step Down converter Bypass mode flag
SMPSF

Step Down converter SMPS mode flag
REGLPS

Low-power regulator started
REGLPF

Low-power regulator flag
VOSF

Voltage scaling flag
PVDO

Power voltage detector output
PVMO3

Peripheral voltage monitoring output: VDDA vs. 1.62 V

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32