Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text
Description
APB1 peripheral clocks enable in Sleep and Stop modes register 2
Fields
LPUART1SMEN | Low power UART 1 clocks enable during CPU1 Sleep mode
|
LPTIM2SMEN | Low power timer 2 clocks enable during CPU1 Sleep mode
|
Links
(
)