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stm32 /stm32wb /STM32WB15_CM4 /RCC /C2APB3ENR

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Interpret as C2APB3ENR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (BLEEN)BLEEN 0 (EN802)EN802

Description

CPU2 APB3ENR

Fields

BLEEN

CPU2 BLE interface clock enable
EN802

CPU2 802.15.4 interface clock enable

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32