Secure SRAM2 start address and cortex M0 reset vector register
SBRV | cortex M0 access control register |
SBRSA | Secure backup SRAM2a start address |
BRSD | backup SRAM2a security disable |
SNBRSA | Secure non backup SRAM2a start address |
NBRSD | non-backup SRAM2b security disable |
C2OPT | CPU2 cortex M0 boot reset vector memory selection |