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stm32 /stm32wb /STM32WB55_CM0P /SYSCFG_VREFBUF /SYSCFG_IMR2

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Interpret as SYSCFG_IMR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PVM1IM)PVM1IM 0 (PVM3IM)PVM3IM 0 (PVDIM)PVDIM

Description

CPU1 interrupt mask register 2

Fields

PVM1IM

Peripheral PVM1 interrupt mask to CPU1
PVM3IM

Peripheral PVM3 interrupt mask to CPU1
PVDIM

Peripheral PVD interrupt mask to CPU1

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32