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stm32 /stm32wb0 /STM32WB05 /BLUE_REG /STATUS2REG

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Interpret as STATUS2REG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (IQSAMPLESREADY)IQSAMPLESREADY 0IQSAMPLESNUMBER 0 (IQSAMPLESMISSINGERROR)IQSAMPLESMISSINGERROR 0 (ANTENNASWITCHINGPATTERNACCESSERROR)ANTENNASWITCHINGPATTERNACCESSERROR 0 (ANTENNA_SWITCHING_PATTERN_ADDRESS_ERROR)ANTENNA_SWITCHING_PATTERN_ADDRESS_ERROR

Description

STATUS2REG register

Fields

IQSAMPLESREADY

indicates if IQ samples have been received on the last reception.
IQSAMPLESNUMBER

indicate the number of IQ samples stored in the RAM buffer addressed by StatMach.
IQSAMPLESMISSINGERROR

IQ sample internal buffer overflow error flag.
ANTENNASWITCHINGPATTERNACCESSERROR

timing error flag related to Antenna Pattern not read on-time.
ANTENNA_SWITCHING_PATTERN_ADDRESS_ERROR

AHB access error flag.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32