stm32 /stm32wb0 /STM32WB05 /GPIOA /ODR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as ODR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (OD0)OD0 0 (OD1)OD1 0 (OD2)OD2 0 (OD3)OD3 0 (OD8)OD8 0 (OD9)OD9 0 (OD10)OD10 0 (OD11)OD11

Description

ODR register

Fields

OD0

OD0: Port A output data bit These bits can be read and written by software

OD1

OD1: Port A output data bit These bits can be read and written by software

OD2

OD2: Port A output data bit These bits can be read and written by software

OD3

OD3: Port A output data bit These bits can be read and written by software

OD8

OD8: Port A output data bit These bits can be read and written by software

OD9

OD9: Port A output data bit These bits can be read and written by software

OD10

OD10: Port A output data bit These bits can be read and written by software

OD11

OD11: Port A output data bit These bits can be read and written by software

Links

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