Regviz

stm32 /stm32wb0 /STM32WB05 /GPIOA /OSPEEDR

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Interpret as OSPEEDR

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https://regviz.com/r/stm32/stm32wb0/STM32WB05/GPIOA/OSPEEDR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0OSPEED0 0OSPEED1 0OSPEED2 0OSPEED3 0OSPEED8 0OSPEED9 0OSPEED10 0OSPEED11

Description

OSPEEDR register

Fields

OSPEED0

OSPEED0[1:0]: Port A configuration bits These bits are written by software to configure the I/O output speed.
OSPEED1

OSPEED1[1:0]: Port A configuration bits These bits are written by software to configure the I/O output speed.
OSPEED2

OSPEED2[1:0]: Port A configuration bits These bits are written by software to configure the I/O output speed.
OSPEED3

OSPEED3[1:0]: Port A configuration bits These bits are written by software to configure the I/O output speed.
OSPEED8

OSPEED8[1:0]: Port A configuration bits These bits are written by software to configure the I/O output speed.
OSPEED9

OSPEED9[1:0]: Port A configuration bits These bits are written by software to configure the I/O output speed.
OSPEED10

OSPEED10[1:0]: Port A configuration bits These bits are written by software to configure the I/O output speed.
OSPEED11

OSPEED11[1:0]: Port A configuration bits These bits are written by software to configure the I/O output speed.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32