stm32 /stm32wb0 /STM32WB05 /RADIO_REG_REG /CR0_LR

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Interpret as CR0_LR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CR_LR_GAIN_AFTER 0CR_LR_GAIN_BEFORE

Description

CR0_LR register

Fields

CR_LR_GAIN_AFTER

Set the gain of the clock recovery loop after Access Address detection to the value 2^(-CR_LR_GAIN_ AFTER) when the coded PHY is in use

CR_LR_GAIN_BEFORE

Set the gain of the clock recovery loop before Access Address detection to the value 2^(-CR_LR_GAIN_ BEFORE) when the coded PHY is in use

Links

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