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stm32 /stm32wb0 /STM32WB05 /TIM16 /CNT

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Interpret as CNT

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0CNT0 (UIF_CPY)UIF_CPY

Description

CNT register

Fields

CNT

CNT[15:0]: Counter value
UIF_CPY

UIFCPY: UIF Copy

This bit is a read-only copy of the UIF bit of the TIMx_ISR register. If the UIFREMAP bit in

TIMx_CR1 is reset, bit 31 is reserved and read as 0.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32