Regviz

stm32 /stm32wb0 /STM32WB05 /TIM2 /DIER

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Interpret as DIER

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (UIE)UIE 0 (CC1IE)CC1IE 0 (CC2IE)CC2IE 0 (CC3IE)CC3IE 0 (CC4IE)CC4IE 0 (TIE)TIE 0 (UDE)UDE 0 (CC1DE)CC1DE 0 (CC2DE)CC2DE 0 (CC3DE)CC3DE 0 (CC4DE)CC4DE 0 (TDE)TDE

Description

DIER register

Fields

UIE

UIE: Update interrupt enable

0: Update interrupt disabled

1: Update interrupt enabled
CC1IE

CC1IE: Capture/Compare 1 interrupt enable

0: CC1 interrupt disabled.

1: CC1 interrupt enabled
CC2IE

CC2IE: Capture/Compare 2 interrupt enable

0: CC2 interrupt disabled

1: CC2 interrupt enabled
CC3IE

CC3IE: Capture/Compare 3 interrupt enable

0: CC3 interrupt disabled

1: CC3 interrupt enabled
CC4IE

CC4IE: Capture/Compare 4 interrupt enable

0: CC4 interrupt disabled

1: CC4 interrupt enabled
TIE

TIE: Trigger interrupt enable

0: Trigger interrupt disabled

1: Trigger interrupt enabled
UDE

UDE: Update DMA request enable

0: Update DMA request disabled

1: Update DMA request enabled
CC1DE

CC1DE: Capture/Compare 1 DMA request enable

0: CC1 DMA request disabled

1: CC1 DMA request enabled
CC2DE

CC2DE: Capture/Compare 2 DMA request enable

0: CC2 DMA request disabled

1: CC2 DMA request enabled
CC3DE

CC3DE: Capture/Compare 3 DMA request enable

0: CC3 DMA request disabled

1: CC3 DMA request enabled
CC4DE

CC4DE: Capture/Compare 4 DMA request enable

0: CC4 DMA request disabled

1: CC4 DMA request enabled
TDE

TDE: Trigger DMA request Enable.

Not used in Blue51. Not available in IUM.

0: Trigger DMA request disabled.

1: Trigger DMA request enabled.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32