Regviz

stm32 /stm32wb0 /STM32WB06 /TIM1 /DIER

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DIER

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/stm32/stm32wb0/STM32WB06/TIM1/DIER#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (UIE)UIE 0 (CC1IE)CC1IE 0 (CC2IE)CC2IE 0 (CC3IE)CC3IE 0 (CC4IE)CC4IE 0 (COMIE)COMIE 0 (TIE)TIE 0 (BIE)BIE

Description

DIER register

Fields

UIE

UIE: Update interrupt enable

0: Update interrupt disabled

1: Update interrupt enabled
CC1IE

CC1IE: Capture/Compare 1 interrupt enable

0: CC1 interrupt disabled.

1: CC1 interrupt enabled
CC2IE

CC2IE: Capture/Compare 2 interrupt enable

0: CC2 interrupt disabled

1: CC2 interrupt enabled
CC3IE

CC3IE: Capture/Compare 3 interrupt enable

0: CC3 interrupt disabled

1: CC3 interrupt enabled
CC4IE

CC4IE: Capture/Compare 4 interrupt enable

0: CC4 interrupt disabled

1: CC4 interrupt enabled
COMIE

COM interrupt enable
TIE

TIE: Trigger interrupt enable

0: Trigger interrupt disabled

1: Trigger interrupt enabled
BIE

Break interrupt enable.

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32