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stm32 /stm32wb0 /STM32WB07 /RADIO /AGC15_DIG_ENG

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Interpret as AGC15_DIG_ENG

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0ATT_IF_5 0 (ATT_LNA_5)ATT_LNA_5 0ATT_ANT_5

Description

AGC15_DIG_ENG register

Fields

ATT_IF_5

Attenuation at IF Level for the AGC step 5
ATT_LNA_5

Attenuation at LNA Level for the AGC step 5
ATT_ANT_5

Attenuation at Antenna Level for the AGC step 5

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32