Cut and paste this URL to share the unmodified register and value:
https://regviz.com/r/stm32/stm32wb0/STM32WB09/TRNG/TRNG_IRQ_SR#0x0
TRNG_IRQ_SR register
Set to 1 when the output fifo is full of new random. Flag is cleared by writing a 1.
Set to 1 when an error is reported by the health tests. Flag is cleared by writing a 1.
https://github.com/modm-io/cmsis-svd-stm32