DBG_STANDBY=B_0x0, DBG_STOP=B_0x0, LPMS=B_0x0, CDS=B_0x0, CS=B_0x0, STOPF=B_0x0, SBF=B_0x0
DBGMCU status and configuration register
| DBG_STOP | Allows debug in Stop mode Write access can be protected by PWR_SECCFGR.LPMSEC. The CPU debug and DBGMCU clocks remain active and the HSI16 oscillators is used as system clock during Stop debug mode, allowing CPU debug capability. On exit from Stop mode, the clock settings are set to the Stop mode exit state. 0 (B_0x0): Normal Stop mode operation, all clocks are disabled automatically in Stop mode. 1 (B_0x1): CPU debug clock enabled in Stop mode, all other peripheral clocks are disabled automatically in Stop mode, except for DBGMCU. |
| DBG_STANDBY | Allows debug in Standby mode Write access can be protected by PWR_SECCFGR.LPMSEC. The CPU debug and DBGMCU clocks remain active and the HSI16 oscillator is used as system clock, the supply and SRAM memory content is maintained during Standby debug mode, allowing CPU debug capability. On exit from Standby mode, a standby reset is performed. 0 (B_0x0): Normal Standby mode operation, all clocks are disabled automatically in Stop mode and core is powered down. 1 (B_0x1): Core power maintained and CPU debug clock enabled in Standby mode, all other are under reset in Stop mode, except for DBGMCU. |
| LPMS | Device low power mode selected 10x: Standby mode others reserved 0 (B_0x0): Stop 0 mode 1 (B_0x1): Stop 1 mode |
| STOPF | Device Stop flag 0 (B_0x0): device not in Stop mode 1 (B_0x1): device in Stop mode |
| SBF | Device Standby flag 0 (B_0x0): Device not in Standby mode 1 (B_0x1): Device in Standby mode |
| CS | CPU Sleep 0 (B_0x0): CPU not in Sleep 1 (B_0x1): CPU in Sleep |
| CDS | CPU DeepSleep 0 (B_0x0): CPU not in DeepSleep 1 (B_0x1): CPU in DeepSleep |