stm32 /stm32wba5 /STM32WBA50 /EXTI /EXTI_EXTICR4

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Interpret as EXTI_EXTICR4

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x00)EXTI120 (B_0x00)EXTI130 (B_0x00)EXTI140 (B_0x00)EXTI15

EXTI13=B_0x00, EXTI15=B_0x00, EXTI14=B_0x00, EXTI12=B_0x00

Description

EXTI external interrupt selection register

Fields

EXTI12

EXTI0 GPIO port selection These bits are written by software to select the source input for EXTI12 external interrupt. When EXTI_SECCFGR.SEC12 is disabled, EXTI12 can be accessed with non-secure and secure access. When EXTI_SECCFGR.SEC12 is enabled, EXTI12 can only be accessed with secure access. Non-secure write is discarded and non-secure read returns 0. When EXTI_PRIVCFGR.PRIV12 is disabled, EXTI12 can be accessed with privileged and unprivileged access. When EXTI_PRIVCFGR.PRIV12 is enabled, EXTI12 can only be accessed with privileged access. Unprivileged write to this bit is discarded. Others: reserved

0 (B_0x00): PA12 pin

1 (B_0x01): PB12 pin

EXTI13

EXTI13 GPIO port selection These bits are written by software to select the source input for EXTI13 external interrupt. When EXTI_SECCFGR.SEC13 is disabled, EXTI13 can be accessed with non-secure and secure access. When EXTI_SECCFGR.SEC13 is enabled, EXTI13 can only be accessed with secure access. Non-secure write is discarded and non-secure read returns 0. When EXTI_PRIVCFGR.PRIV13 is disabled, EXTI13 can be accessed with privileged and unprivileged access. When EXTI_PRIVCFGR.PRIV13 is enabled, EXTI13 can only be accessed with privileged access. Unprivileged write to this bit is discarded. Others: reserved

0 (B_0x00): PA13 pin

1 (B_0x01): PB13 pin

2 (B_0x02): PC13 pin

EXTI14

EXTI14 GPIO port selection These bits are written by software to select the source input for EXTI14 external interrupt. When EXTI_SECCFGR.SEC14 is disabled, EXTI14 can be accessed with non-secure and secure access. When EXTI_SECCFGR.SEC14 is enabled, EXTI14 can only be accessed with secure access. Non-secure write is discarded and non-secure read returns 0. When EXTI_PRIVCFGR.PRIV14 is disabled, EXTI14 can be accessed with privileged and unprivileged access. When EXTI_PRIVCFGR.PRIV14 is enabled, EXTI14 can only be accessed with privileged access. Unprivileged write to this bit is discarded. Others: reserved

0 (B_0x00): PA14 pin

1 (B_0x01): PB14 pin

2 (B_0x02): PC14 pin

EXTI15

EXTI15 GPIO port selection These bits are written by software to select the source input for EXTI15 external interrupt. When EXTI_SECCFGR.SEC15 is disabled, EXTI15 can be accessed with non-secure and secure access. When EXTI_SECCFGR.SEC15 is enabled, EXTI15 can only be accessed with secure access. Non-secure write is discarded and non-secure read returns 0. When EXTI_PRIVCFGR.PRIV15 is disabled, EXTI15 can be accessed with privileged and unprivileged access. When EXTI_PRIVCFGR.PRIV15 is enabled, EXTI15 can only be accessed with privileged access. Unprivileged write to this bit is discarded. Others: reserved

0 (B_0x00): PA15 pin

1 (B_0x01): PB15 pin

2 (B_0x02): PC15 pin

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