stm32 /stm32wba5 /STM32WBA50 /GPIOH /GPIOH_LCKR

Port H lock I/O pin 3 This bit is read/write but can only be written when the LCKK bit is 0 Access can be protected by GPIOH SEC3.

0 (B_0x0): Port configuration not locked

1 (B_0x1): Port configuration locked

Lock key This bit can be read any time. It can only be modified using the lock key write sequence. Access is protected by GPIOH SEC3.

• LOCK key write sequence: WR LCKR[16] = 1 + LCKR[3] WR LCKR[16] = 0 + LCKR[3] WR LCKR[16] = 1 + LCKR[3]
• LOCK key read RD LCKR[16] = 1 (this read operation is optional but it confirms that the lock is active) Note: During the LOCK key write sequence, the value of LCK3 must not change. Note: Any error in the lock sequence aborts the LOCK. Note: After the first LOCK sequence on any bit of the port, any read access on the LCKK bit returns 1 until the next MCU reset or peripheral reset.

0 (B_0x0): Port configuration lock key not active

1 (B_0x1): Port configuration lock key active. The GPIOH_LCKR register is locked until the next MCU reset or peripheral reset.