IDLEDIS=B_0x0, TRIGEN=B_0x0, TRIGPOL=B_0x0, TRIGSEL=B_0x0
LPUART Autonomous mode control register
| TDN | TDC transmission data number This bitfield enables the programming of the number of data to be transmitted. It can be written only when UE is cleared in LPUART_CR1. |
| TRIGPOL | Trigger polarity bit This bitfield can be written only when the UE bit is cleared in LPUART_CR1 register. 0 (B_0x0): Trigger active on rising edge 1 (B_0x1): Trigger active on falling edge |
| TRIGEN | Trigger enable bit Note: This bitfield can be written only when the UE bit of USART_CR1 register is cleared. Note: When a trigger is detected, TE is set to 1 in LPUART_CR1 and the data transfer is launched. 0 (B_0x0): Trigger disabled 1 (B_0x1): Trigger enabled |
| IDLEDIS | Idle frame transmission disable bit after enabling the transmitter Note: This bitfield can be written only when the UE bit of USART_CR1 register is cleared. 0 (B_0x0): Idle frame sent after enabling the transmitter (TE = 1 in LPUART_CR1) 1 (B_0x1): Idle frame not sent after enabling the transmitter |
| TRIGSEL | Trigger selection bits Refer to Section : Description LPUART interconnections. This bitfield can be written only when the UE bit is cleared in LPUART_CR1 register. … Note: This bitfield can be written only when the UE bit of USART_CR1 register is cleared. 0 (B_0x0): lpuart_trg0 selected 1 (B_0x1): lpuart_trg1 selected 15 (B_0xF): lpuart_trg15 selected |