PWR_SVMCR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as PWR_SVMCR

PVDLS=B_0x0, PVDE=B_0x0

Description

PWR supply voltage monitoring control register

Fields

PVDE

Programmable voltage detector enable

0 (B_0x0): Programmable voltage detector disabled

1 (B_0x1): Programmable voltage detector enabled

PVDLS

Programmable voltage detector level selection These bits select the voltage threshold detected by the programmable voltage detector:

0 (B_0x0): VsubPVD0/sub ~ 2.0 V

1 (B_0x1): VsubPVD1/sub ~ 2.2 V

2 (B_0x2): VsubPVD2/sub ~ 2.4 V

3 (B_0x3): VsubPVD3/sub ~ 2.5 V

4 (B_0x4): VsubPVD4/sub ~ 2.6 V

5 (B_0x5): VsubPVD5/sub ~ 2.8 V

6 (B_0x6): VsubPVD6/sub ~ 2.9 V

7 (B_0x7): External input analog voltage PVD_IN (compared internally to VREFINT), The I/O used as PVD_IN input, must be configured in analog mode in the GPIO register.

Links

()