G2_IO2=B_0x0, G5_IO4=B_0x0, G2_IO1=B_0x0, G5_IO2=B_0x0, G3_IO3=B_0x0, G4_IO2=B_0x0, G6_IO4=B_0x0, G1_IO2=B_0x0, G4_IO1=B_0x0, G3_IO4=B_0x0, G5_IO1=B_0x0, G4_IO4=B_0x0, G6_IO3=B_0x0, G3_IO2=B_0x0, G2_IO4=B_0x0, G2_IO3=B_0x0, G6_IO2=B_0x0, G1_IO4=B_0x0, G1_IO1=B_0x0, G3_IO1=B_0x0, G1_IO3=B_0x0, G6_IO1=B_0x0, G4_IO3=B_0x0, G5_IO3=B_0x0
TSC I/O hysteresis control register
| G1_IO1 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G1_IO2 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G1_IO3 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G1_IO4 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G2_IO1 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G2_IO2 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G2_IO3 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G2_IO4 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G3_IO1 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G3_IO2 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G3_IO3 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G3_IO4 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G4_IO1 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G4_IO2 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G4_IO3 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G4_IO4 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G5_IO1 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G5_IO2 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G5_IO3 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G5_IO4 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G6_IO1 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G6_IO2 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G6_IO3 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |
| G6_IO4 | Gx_IOy Schmitt trigger hysteresis mode, x = 8 to 1, y = 4 to 1. These bits are set and cleared by software to enable/disable the Gx_IOy Schmitt trigger hysteresis. Note: These bits control the I/O Schmitt trigger hysteresis whatever the I/O control mode is (even if controlled by standard GPIO registers). 0 (B_0x0): Gx_IOy Schmitt trigger hysteresis disabled 1 (B_0x1): Gx_IOy Schmitt trigger hysteresis enabled |