stm32 /stm32wba5 /STM32WBA52 /GPIOB /GPIOB_ODR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as GPIOB_ODR

Description

GPIO port B output data register

Fields

OD0	Port output data I/O pin y These bits can be read and written by software. Access can be protected by GPIOB SECy. Note that bit 10 is reserved on STM32WBA55xx devices. Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the GPIOB_BSRR or GPIOB_BRR registers.
OD1	Port output data I/O pin y These bits can be read and written by software. Access can be protected by GPIOB SECy. Note that bit 10 is reserved on STM32WBA55xx devices. Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the GPIOB_BSRR or GPIOB_BRR registers.
OD2	Port output data I/O pin y These bits can be read and written by software. Access can be protected by GPIOB SECy. Note that bit 10 is reserved on STM32WBA55xx devices. Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the GPIOB_BSRR or GPIOB_BRR registers.
OD3	Port output data I/O pin y These bits can be read and written by software. Access can be protected by GPIOB SECy. Note that bit 10 is reserved on STM32WBA55xx devices. Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the GPIOB_BSRR or GPIOB_BRR registers.
OD4	Port output data I/O pin y These bits can be read and written by software. Access can be protected by GPIOB SECy. Note that bit 10 is reserved on STM32WBA55xx devices. Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the GPIOB_BSRR or GPIOB_BRR registers.
OD5	Port output data I/O pin y These bits can be read and written by software. Access can be protected by GPIOB SECy. Note that bit 10 is reserved on STM32WBA55xx devices. Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the GPIOB_BSRR or GPIOB_BRR registers.
OD6	Port output data I/O pin y These bits can be read and written by software. Access can be protected by GPIOB SECy. Note that bit 10 is reserved on STM32WBA55xx devices. Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the GPIOB_BSRR or GPIOB_BRR registers.
OD7	Port output data I/O pin y These bits can be read and written by software. Access can be protected by GPIOB SECy. Note that bit 10 is reserved on STM32WBA55xx devices. Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the GPIOB_BSRR or GPIOB_BRR registers.
OD8	Port output data I/O pin y These bits can be read and written by software. Access can be protected by GPIOB SECy. Note that bit 10 is reserved on STM32WBA55xx devices. Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the GPIOB_BSRR or GPIOB_BRR registers.
OD9	Port output data I/O pin y These bits can be read and written by software. Access can be protected by GPIOB SECy. Note that bit 10 is reserved on STM32WBA55xx devices. Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the GPIOB_BSRR or GPIOB_BRR registers.
OD10	Port output data I/O pin y These bits can be read and written by software. Access can be protected by GPIOB SECy. Note that bit 10 is reserved on STM32WBA55xx devices. Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the GPIOB_BSRR or GPIOB_BRR registers.
OD11	Port output data I/O pin y These bits can be read and written by software. Access can be protected by GPIOB SECy. Note that bit 10 is reserved on STM32WBA55xx devices. Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the GPIOB_BSRR or GPIOB_BRR registers.
OD12	Port output data I/O pin y These bits can be read and written by software. Access can be protected by GPIOB SECy. Note that bit 10 is reserved on STM32WBA55xx devices. Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the GPIOB_BSRR or GPIOB_BRR registers.
OD13	Port output data I/O pin y These bits can be read and written by software. Access can be protected by GPIOB SECy. Note that bit 10 is reserved on STM32WBA55xx devices. Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the GPIOB_BSRR or GPIOB_BRR registers.
OD14	Port output data I/O pin y These bits can be read and written by software. Access can be protected by GPIOB SECy. Note that bit 10 is reserved on STM32WBA55xx devices. Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the GPIOB_BSRR or GPIOB_BRR registers.
OD15	Port output data I/O pin y These bits can be read and written by software. Access can be protected by GPIOB SECy. Note that bit 10 is reserved on STM32WBA55xx devices. Note: For atomic bit set/reset, the OD bits can be individually set and/or reset by writing to the GPIOB_BSRR or GPIOB_BRR registers.

Links

()