stm32 /stm32wba5 /STM32WBA52 /GPIOB /GPIOB_SECCFGR

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Interpret as GPIOB_SECCFGR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SEC0 0 (B_0x0)SEC1 0 (B_0x0)SEC2 0 (B_0x0)SEC3 0 (B_0x0)SEC4 0 (B_0x0)SEC5 0 (B_0x0)SEC6 0 (B_0x0)SEC7 0 (B_0x0)SEC8 0 (B_0x0)SEC9 0 (B_0x0)SEC10 0 (B_0x0)SEC11 0 (B_0x0)SEC12 0 (B_0x0)SEC13 0 (B_0x0)SEC14 0 (B_0x0)SEC15

SEC13=B_0x0, SEC12=B_0x0, SEC0=B_0x0, SEC10=B_0x0, SEC3=B_0x0, SEC5=B_0x0, SEC4=B_0x0, SEC7=B_0x0, SEC14=B_0x0, SEC11=B_0x0, SEC15=B_0x0, SEC1=B_0x0, SEC6=B_0x0, SEC8=B_0x0, SEC9=B_0x0, SEC2=B_0x0

Description

GPIO port B secure configuration register

Fields

SEC0

I/O pin of port secure bit enable y These bits are written by software to enabled the security I/O port pin. Note that bit 10 is reserved on STM32WBA55xx devices.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

SEC1

I/O pin of port secure bit enable y These bits are written by software to enabled the security I/O port pin. Note that bit 10 is reserved on STM32WBA55xx devices.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

SEC2

I/O pin of port secure bit enable y These bits are written by software to enabled the security I/O port pin. Note that bit 10 is reserved on STM32WBA55xx devices.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

SEC3

I/O pin of port secure bit enable y These bits are written by software to enabled the security I/O port pin. Note that bit 10 is reserved on STM32WBA55xx devices.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

SEC4

I/O pin of port secure bit enable y These bits are written by software to enabled the security I/O port pin. Note that bit 10 is reserved on STM32WBA55xx devices.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

SEC5

I/O pin of port secure bit enable y These bits are written by software to enabled the security I/O port pin. Note that bit 10 is reserved on STM32WBA55xx devices.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

SEC6

I/O pin of port secure bit enable y These bits are written by software to enabled the security I/O port pin. Note that bit 10 is reserved on STM32WBA55xx devices.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

SEC7

I/O pin of port secure bit enable y These bits are written by software to enabled the security I/O port pin. Note that bit 10 is reserved on STM32WBA55xx devices.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

SEC8

I/O pin of port secure bit enable y These bits are written by software to enabled the security I/O port pin. Note that bit 10 is reserved on STM32WBA55xx devices.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

SEC9

I/O pin of port secure bit enable y These bits are written by software to enabled the security I/O port pin. Note that bit 10 is reserved on STM32WBA55xx devices.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

SEC10

I/O pin of port secure bit enable y These bits are written by software to enabled the security I/O port pin. Note that bit 10 is reserved on STM32WBA55xx devices.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

SEC11

I/O pin of port secure bit enable y These bits are written by software to enabled the security I/O port pin. Note that bit 10 is reserved on STM32WBA55xx devices.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

SEC12

I/O pin of port secure bit enable y These bits are written by software to enabled the security I/O port pin. Note that bit 10 is reserved on STM32WBA55xx devices.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

SEC13

I/O pin of port secure bit enable y These bits are written by software to enabled the security I/O port pin. Note that bit 10 is reserved on STM32WBA55xx devices.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

SEC14

I/O pin of port secure bit enable y These bits are written by software to enabled the security I/O port pin. Note that bit 10 is reserved on STM32WBA55xx devices.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

SEC15

I/O pin of port secure bit enable y These bits are written by software to enabled the security I/O port pin. Note that bit 10 is reserved on STM32WBA55xx devices.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

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