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stm32 /stm32wba5 /STM32WBA52 /GPIOH /GPIOH_SECCFGR

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Interpret as GPIOH_SECCFGR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)SEC3

SEC3=B_0x0

Description

GPIO port H secure configuration register

Fields

SEC3

I/O pin of port H secure bit enable 3 This bit is written by software to enabled the security I/O port pin.

0 (B_0x0): The I/O pin is non-secure

1 (B_0x1): The I/O pin is secure. Refer to Table 112 for all corresponding secured bits.

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32