stm32 /stm32wba5 /STM32WBA52 /GTZC1_TZSC /GTZC1_TZSC_PRIVCFGR1

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as GTZC1_TZSC_PRIVCFGR1

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)TIM2PRIV 0 (B_0x0)TIM3PRIV 0 (B_0x0)WWDGPRIV 0 (B_0x0)IWDGPRIV 0 (B_0x0)USART2PRIV 0 (B_0x0)I2C1PRIV 0 (B_0x0)LPTIM2PRIV

USART2PRIV=B_0x0, IWDGPRIV=B_0x0, TIM2PRIV=B_0x0, LPTIM2PRIV=B_0x0, WWDGPRIV=B_0x0, I2C1PRIV=B_0x0, TIM3PRIV=B_0x0

Description

GTZC1 TZSC privilege configuration register 1

Fields

TIM2PRIV

privileged access mode for TIM2

0 (B_0x0): unprivileged

1 (B_0x1): privileged

TIM3PRIV

privileged access mode for TIM3

0 (B_0x0): unprivileged

1 (B_0x1): privileged

WWDGPRIV

privileged access mode for WWDG

0 (B_0x0): unprivileged

1 (B_0x1): privileged

IWDGPRIV

privileged access mode for IWDG

0 (B_0x0): unprivileged

1 (B_0x1): privileged

USART2PRIV

privileged access mode for USART2

0 (B_0x0): unprivileged

1 (B_0x1): privileged

I2C1PRIV

privileged access mode for I2C1

0 (B_0x0): unprivileged

1 (B_0x1): privileged

LPTIM2PRIV

privileged access mode for LPTIM2

0 (B_0x0): unprivileged

1 (B_0x1): privileged

Links

()