stm32 /stm32wba5 /STM32WBA52 /HSEM /HSEM_IER

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as HSEM_IER

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (B_0x0)ISE

ISE=B_0x0

Description

HSEM non-secure interrupt enable register

Fields

ISE

Non-secure Interrupt semaphore x enable bit This bit is read and written by software. When semaphore x SECx is disabled, bit x can be accessed with secure and non-secure access. When semaphore x SECx is enabled, bit x is forced to 0 and cannot be accessed, write to this bit is discarded and a read returns 0. When semaphore x PRIVx is disabled, bit x can be accessed with privilege and unprivileged access. When semaphore x PRIVx is enabled, bit x can be accessed only with privileged access. Unprivileged write to this bit is discarded, unprivileged read returns 0.

0 (B_0x0): Non-secure Interrupt generation for semaphore x disabled (masked)

1 (B_0x1): Non-secure Interrupt generation for semaphore x enabled (not masked)

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