HSEM_SICR

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Interpret as HSEM_SICR

SISC=B_0x0

Description

HSEM secure interrupt clear register

Fields

SISC

Secure interrupt semaphore x clear bit This bit is written by software, and is always read 0. When semaphore x PRIVx is disabled, bit x can be accessed with secure privilege and secure unprivileged access. When semaphore x PRIVx is enabled, bit x can be accessed only with secure privilege access. Secure unprivileged write to this bit is discarded.

0 (B_0x0): Secure interrupt semaphore x status ISFx and masked status MISFx not affected.

1 (B_0x1): Secure interrupt semaphore x status ISFx and masked status MISFx cleared.

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