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stm32 /stm32wl /STM32WL5x_CM0P /ADC /ADC_AWD2CR

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Interpret as ADC_AWD2CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0AWD2CH

Description

ADC Analog Watchdog 2 Configuration register

Fields

AWD2CH

AWD2CH

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32