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stm32 /stm32wl /STM32WL5x_CM0P /ADC /ADC_ISR

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Interpret as ADC_ISR

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https://regviz.com/r/stm32/stm32wl/STM32WL5x_CM0P/ADC/ADC_ISR#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ADRDY)ADRDY 0 (EOSMP)EOSMP 0 (EOC)EOC 0 (EOS)EOS 0 (OVR)OVR 0 (AWD1)AWD1 0 (AWD2)AWD2 0 (AWD3)AWD3 0 (EOCAL)EOCAL 0 (CCRDY)CCRDY

Description

ADC interrupt and status register

Fields

ADRDY

ADRDY
EOSMP

EOSMP
EOC

EOC
EOS

EOS
OVR

OVR
AWD1

AWD1
AWD2

AWD2
AWD3

AWD3
EOCAL

EOCAL
CCRDY

CCRDY

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32