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stm32 /stm32wl /STM32WL5x_CM0P /FLASH /C2CR

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Interpret as C2CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PG)PG 0 (PER)PER 0 (MER)MER 0PNB0 (STRT)STRT 0 (FSTPG)FSTPG 0 (EOPIE)EOPIE 0 (ERRIE)ERRIE 0 (RDERRIE)RDERRIE

Description

Flash CPU2 control register

Fields

PG

Programming
PER

Page erase
MER

Mass erase
PNB

Page number selection
STRT

Start
FSTPG

Fast programming
EOPIE

End of operation interrupt enable
ERRIE

Error interrupt enable
RDERRIE

RDERRIE

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32