SRRVR

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Interpret as SRRVR

Flash secure SRAM start address and CPU2 reset vector register

SBRV	CPU2 boot reset vector
SBRSA	Secure backup SRAM2 start address
BRSD	backup SRAM2 security disable
SNBRSA	Secure non-backup SRAM1 start address
NBRSD	NBRSD
C2OPT	C2OPT

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