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stm32 /stm32wl /STM32WL5x_CM0P /PWR /SUBGHZSPICR

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Interpret as SUBGHZSPICR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (NSS)NSS

Description

Power SPI3 control register

Fields

NSS

sub-GHz SPI NSS control

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32