stm32 /stm32wl /STM32WL5x_CM0P /RCC /C2AHB2ENR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as C2AHB2ENR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (GPIOAEN)GPIOAEN 0 (GPIOBEN)GPIOBEN 0 (GPIOCEN)GPIOCEN 0 (GPIOHEN)GPIOHEN

Description

CPU2 AHB2 peripheral clock enable register

Fields

GPIOAEN

CPU2 IO port A clock enable

GPIOBEN

CPU2 IO port B clock enable

GPIOCEN

CPU2 IO port C clock enable

GPIOHEN

CPU2 IO port H clock enable

Links

()