stm32 /stm32wl /STM32WL5x_CM0P /RCC /C2AHB3ENR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as C2AHB3ENR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (PKAEN)PKAEN 0 (AESEN)AESEN 0 (RNGEN)RNGEN 0 (HSEMEN)HSEMEN 0 (IPCCEN)IPCCEN 0 (FLASHEN)FLASHEN

Description

CPU2 AHB3 peripheral clock enable register [dual core device only]

Fields

PKAEN

CPU2 PKA accelerator clock enable

AESEN

CPU2 AES accelerator clock enable

RNGEN

CPU2 True RNG clocks enable

HSEMEN

CPU2 HSEM clock enable

IPCCEN

CPU2 IPCC interface clock enable

FLASHEN

CPU2 Flash interface clock enable

Links

()