stm32 /stm32wl /STM32WL5x_CM0P /RCC /CCIPR

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Interpret as CCIPR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0USART1SEL 0USART2SEL 0SPI2S2SEL 0LPUART1SEL 0I2C1SEL 0I2C2SEL 0I2C3SEL 0LPTIM1SEL 0LPTIM2SEL 0LPTIM3SEL 0ADCSEL 0RNGSEL

Description

Peripherals independent clock configuration register

Fields

USART1SEL

USART1 clock source selection

USART2SEL

USART2 clock source selection

SPI2S2SEL

SPI2S2 I2S clock source selection

LPUART1SEL

LPUART1 clock source selection

I2C1SEL

I2C1 clock source selection

I2C2SEL

I2C2 clock source selection

I2C3SEL

I2C3 clock source selection

LPTIM1SEL

Low power timer 1 clock source selection

LPTIM2SEL

Low power timer 2 clock source selection

LPTIM3SEL

Low power timer 3 clock source selection

ADCSEL

ADC clock source selection

RNGSEL

RNG clock source selection

Links

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