stm32 /stm32wl /STM32WL5x_CM0P /SYSCFG_continue /C2IMR2

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Interpret as C2IMR2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DMA1CH1IM)DMA1CH1IM 0 (DMA1CH2IM)DMA1CH2IM 0 (DMA1CH3IM)DMA1CH3IM 0 (DMA1CH4IM)DMA1CH4IM 0 (DMA1CH5IM)DMA1CH5IM 0 (DMA1CH6IM)DMA1CH6IM 0 (DMA1CH7IM)DMA1CH7IM 0 (DMA2CH1IM)DMA2CH1IM 0 (DMA2CH2IM)DMA2CH2IM 0 (DMA2CH3IM)DMA2CH3IM 0 (DMA2CH4IM)DMA2CH4IM 0 (DMA2CH5IM)DMA2CH5IM 0 (DMA2CH6IM)DMA2CH6IM 0 (DMA2CH7IM)DMA2CH7IM 0 (DMAMUX1IM)DMAMUX1IM 0 (PVM3IM)PVM3IM 0 (PVDIM)PVDIM

Description

C2IMR2

Fields

DMA1CH1IM

Peripheral DMA1CH1 interrupt mask to CPU2

DMA1CH2IM

Peripheral DMA1CH2 interrupt mask to CPU2

DMA1CH3IM

Peripheral DMA1CH3 interrupt mask to CPU2

DMA1CH4IM

Peripheral DMA1CH4 interrupt mask to CPU2

DMA1CH5IM

Peripheral DMA1CH5 interrupt mask to CPU2

DMA1CH6IM

Peripheral DMA1CH6 interrupt mask to CPU2

DMA1CH7IM

Peripheral DMA1CH7 interrupt mask to CPU2

DMA2CH1IM

Peripheral DMA2CH1 interrupt mask to CPU2

DMA2CH2IM

Peripheral DMA2CH2 interrupt mask to CPU2

DMA2CH3IM

Peripheral DMA2CH3 interrupt mask to CPU2

DMA2CH4IM

Peripheral DMA2CH4 interrupt mask to CPU2

DMA2CH5IM

Peripheral DMA2CH5 interrupt mask to CPU2

DMA2CH6IM

Peripheral DMA2CH6 interrupt mask to CPU2

DMA2CH7IM

Peripheral DMA2CH7 interrupt mask to CPU2

DMAMUX1IM

Peripheral DMAMUX1 interrupt mask to CPU2

PVM3IM

Peripheral PVM3 interrupt mask to CPU2

PVDIM

Peripheral PVD interrupt mask to CPU2

Links

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