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stm32 /stm32wl /STM32WL5x_CM0P /TAMP /CR2

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Interpret as CR2

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (TAMP1NOER)TAMP1NOER 0 (TAMP2NOER)TAMP2NOER 0 (TAMP3NOER)TAMP3NOER 0 (TAMP1MSK)TAMP1MSK 0 (TAMP2MSK)TAMP2MSK 0 (TAMP3MSK)TAMP3MSK 0 (BKERASE)BKERASE 0 (TAMP1TRG)TAMP1TRG 0 (TAMP2TRG)TAMP2TRG 0 (TAMP3TRG)TAMP3TRG

Description

control register 2

Fields

TAMP1NOER

TAMP1NOER
TAMP2NOER

TAMP2NOER
TAMP3NOER

TAMP3NOER
TAMP1MSK

TAMP1MSK
TAMP2MSK

TAMP2MSK
TAMP3MSK

TAMP3MSK
BKERASE

Backup registerserase
TAMP1TRG

TAMP1TRG
TAMP2TRG

TAMP2TRG
TAMP3TRG

TAMP3TRG

Links

()

Register Reference

https://github.com/modm-io/cmsis-svd-stm32