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Description
APB1 peripheral clocks enable in Sleep mode register 2
Fields
LPUART1SMEN | Low power UART 1 clock enable during CPU1 Csleep and CStop modes.
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LPTIM2SMEN | Low power timer 2 clock enable during CPU1 Csleep and CStop modes
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LPTIM3SMEN | Low power timer 3 clock enable during CPU1 Csleep and CStop modes
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