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stm32 /stm32wl /STM32WLE5_CM4 /DBGMCU /CR

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Interpret as CR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (DBG_SLEEP)DBG_SLEEP 0 (DBG_STOP)DBG_STOP 0 (DBG_STANDBY)DBG_STANDBY

Description

DBGMCU Configuration Register

Fields

DBG_SLEEP

Allow debug in SLEEP mode
DBG_STOP

Allow debug in STOP mode
DBG_STANDBY

Allow debug in STANDBY mode

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32