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stm32 /stm32wl /STM32WLE5_CM4 /PWR /EXTSCR

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Interpret as EXTSCR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (C1CSSF)C1CSSF 0 (C1SBF)C1SBF 0 (C1STOP2F)C1STOP2F 0 (C1STOPF)C1STOPF 0 (C1DS)C1DS

Description

Power extended status and status clear register

Fields

C1CSSF

Clear CPU1 Stop Standby flags
C1SBF

System Standby flag for CPU1. (no core states retained)
C1STOP2F

System Stop2 flag for CPU1. (partial core states retained)
C1STOPF

System Stop0, 1 flag for CPU1. (All core states retained)
C1DS

CPU1 deepsleep mode

Links

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Register Reference

https://github.com/modm-io/cmsis-svd-stm32